Each configuration is used where its particular weakness does not matter and its strength does: a-ii, b-iii, c-i, d-iv — option 2.

The CE-against-CB pairing is the heart of the question. The common-emitter stage inverts, so its collector-base capacitance is multiplied by the voltage gain when referred to the input:

\(C_{in}=C_{bc}\left(1+|A_{V}|\right)\)

That Miller effect can turn 4 pF into 400 pF, which loads the source heavily and rolls the response off early — unimportant at audio frequencies, fatal at RF. The common-base stage has its base at signal ground and does not invert, so no Miller multiplication occurs; it therefore has by far the highest cut-off frequency of the three and is the classic RF stage. Its low input impedance is a nuisance elsewhere but an advantage at RF, where it matches 50 Ω sources naturally.

c — why the JFET pairs with "low bandwidth, high input impedance". Its gate is a reverse-biased junction drawing only nanoamps, giving an input impedance of \(10^{9}\ \Omega\) or more — far beyond any bipolar stage. The bandwidth caveat follows from the same structure: the gate capacitance is comparatively large and the transconductance small, so the gain-bandwidth product is modest.

d — the emitter follower as a buffer. Its voltage gain is just under unity and it does not invert, but the impedances are transformed by \(\beta\):

\(Z_{in}\approx\beta R_{E},\qquad Z_{out}\approx\dfrac{R_{S}}{\beta}+r_{e}\)

so it presents a light load to the source and drives a heavy load easily. Providing no voltage gain at all is exactly what a buffer is for — it changes impedance, not amplitude.

Hence, the correct code is a-ii, b-iii, c-i, d-iv.