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Question

In semiconductor, Fermi level lies :

(a) Close to Valence Band (VB) in p-type
(b) Close to Conduction Band (CB) in p-type
(c) Close to Conduction Band in n-type
(d) Close to Valence Band in n-type

Which is correct ?

This question was previously asked in
UGC NET 2015 Paper 1 Question Paper (27-Dec-2015)
The correct answer is

(a), (c)

The Fermi level marks where the probability of occupation is one half, so it moves towards whichever band is more heavily populated.

In n-type material the donors contribute electrons to the conduction band, so \(n\gg p\) and the Fermi level rises towards the conduction band — statement (c). Quantitatively,

\(E_{F}=E_{C}-kT\ln\left(\dfrac{N_{C}}{N_{D}}\right)\)

so the heavier the donor doping ND, the closer EF creeps to EC.

In p-type material the acceptors create holes in the valence band, so \(p\gg n\) and the Fermi level falls towards the valence band — statement (a):

\(E_{F}=E_{V}+kT\ln\left(\dfrac{N_{V}}{N_{A}}\right)\)

So (a) and (c) — option 3. Statements (b) and (d) are these two exactly reversed.

MaterialMajority carrierEF position
Intrinsicn = pNear mid-gap
n-typeElectronsNear EC
p-typeHolesNear EV

The memory aid that never fails : the Fermi level moves towards the carriers. Electrons live at the top of the gap, holes at the bottom, so n-type pulls EF up and p-type pulls it down.

Two consequences worth knowing.

Degeneracy. Dope heavily enough — beyond roughly \(10^{19}\ \text{cm}^{-3}\) — and EF moves right into the band itself. The material is then degenerate and behaves much like a metal, which is exactly the condition exploited by the tunnel diode and by the heavily doped contact regions of every transistor.

The built-in potential of a junction. When p and n material are joined, the two Fermi levels must line up at equilibrium — a single EF throughout, since no net current flows. The bands must therefore bend, and the amount of bending is the built-in potential:

\(V_{bi}=\dfrac{kT}{q}\ln\left(\dfrac{N_{A}N_{D}}{n_{i}^{2}}\right)\)

That single requirement — a flat Fermi level at equilibrium — is the starting point of every pn-junction, MOS and heterojunction band diagram.

Temperature pushes EF back towards mid-gap: as the intrinsic carrier concentration rises, the doping matters proportionally less, and at high enough temperature an extrinsic semiconductor behaves intrinsically — which is what ultimately limits a device's operating temperature.

Hence, the correct statements are (a) and (c).

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