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Question

In the 8085 microprocessor, what will be the value of the Program Counter after execution of the instruction RST 3?

This question was previously asked in
RRB JE 2025 CBT 2 Mechanical and Allied Engg Question Paper English (2-Jul-2026) (Shift-1)
The correct answer is

0018H

The RST n (Restart) instructions of the Intel 8085 are single-byte software interrupt / call instructions. When executed, the processor pushes the current contents of the Program Counter (PC) onto the stack (so the program can return later) and then loads the PC with a fixed restart vector address, causing execution to jump there.

The vector address is computed by a simple rule:

Restart address = n × 8 = n × 0008H

Applying this to the standard restart set:

InstructionVector address
RST 00000H
RST 10008H
RST 20010H
RST 30018H
RST 40020H
RST 50028H
RST 60030H
RST 70038H

For RST 3: 3 × 8 = 24 decimal = 18 in hexadecimal, so the PC is loaded with 0018H. This is the correct answer.

The value 0030H is the vector for RST 6, not RST 3. The value 0024H (36 decimal) does not correspond to any RST vector, since valid vectors are always multiples of 8. The value 0003H comes from mistakenly reading the operand 3 directly as an address instead of multiplying by 8, which ignores how the restart mechanism computes its vector.

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Important Questions from Instruction Set of 8085

  1. Calculate the time required to execute the entire instruction cycle if two machine codes, 0011 1110 and 0011 0010, are stored in memory locations 2000H and 2001H, respectively.

    If the clock frequency is 2 MHz, the first machine code represents opcode to load data byte in the accumulator and the second code represents data to be loaded in the accumulator.

  2. Following instruction is executed in 8085, LDB 4000H

    Identify the correct statement.

  3. In 8085A microprocessor, the operation performed by the instruction LHLD 2100H is

  4. __________ address instruction is supplied to the microprocessor by an external device for INTR signal acknowledgement.

  5. A fetch cycle is the

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