List - I
(Addressing Modes)List - II
(Instruction)A. Immediate Addressing I. LDAX B B. Register Addressing II. OUT 01H C. Direct Addressing III. MVI B, 37H D. Indirect Addressing IV. MOV A, B
This question requires matching the addressing modes listed in List - I with the corresponding instructions from List - II.
Based on the analysis above, we can establish the following matches:
| List - I (Addressing Mode) | List - II (Instruction) | Match |
| A. Immediate Addressing | III. MVI B, 37H | A - III |
| B. Register Addressing | IV. MOV A, B | B - IV |
| C. Direct Addressing | II. OUT 01H | C - II |
| D. Indirect Addressing | I. LDAX B | D - I |
The correct combination is A-III, B-IV, C-II, D-I. This corresponds to Option 3 provided in the question choices.
| List - I | List - II |
| (Memory) | (Characteristic) |
| A. ROM | I. Volatile, Fast, Expensive |
| B. EPROM | II. UV erasable |
| C. EEPROM | III. Electrically erasable |
| D. SRAM | IV. Non-Volatile, permanent data |
| List - I | List - II |
| (Bus/Logic) | (Function/Characteristic) |
| A. Address bus | I. Carries read/write signals, timing signals, and interrupt signals |
| B. Data bus | II. A three-state output that can be high, low, or high-impedance |
| C. Control bus | III. Unidirectional lines used by CPU to point to a memory location or I/O device |
| D. Tristate logic | IV. Bidirectional lines used for transferring data between the CPU and memory |