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Question

For a JFET, above the pinch-off voltage, as the drain voltage increases, the

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UGC NET 2014 Paper 2 History Question Paper (28-Dec-2014)
The correct answer is

the drain current remains constant.

 Above pinch-off the JFET leaves the resistive region and becomes a current source — its drain current stops depending on the drain voltage. That is option 1.

Why the current saturates. The gate-channel junctions are reverse biased, and the reverse bias is largest at the drain end, where the drain voltage adds to it. As \(V_{DS}\) rises, the depletion regions widen most near the drain and the channel narrows into a wedge. At \(V_{DS}=V_{P}\) the channel is pinched off at the drain end.

Beyond that point, two effects cancel almost exactly. Raising \(V_{DS}\) further increases the field along the channel, which would raise the current; but it also lengthens the pinched region and shortens the conducting channel, which resists it. The extra voltage is dropped across the pinched-off region, and the current settles at

\(I_{D}=I_{DSS}\left(1-\dfrac{V_{GS}}{V_{P}}\right)^{2}\)

— an expression containing \(V_{GS}\) but no \(V_{DS}\) at all. The current is set by the gate voltage alone.

RegionConditionBehaviour
Ohmic\(V_{DS}\lt V_{P}\)Acts as a voltage-controlled resistor; ID rises with VDS
Saturation\(V_{DS}\gt V_{P}\)ID constant — a current source
BreakdownVDS very largeAvalanche at the drain junction; ID rises sharply

Option 4 describes the wrong axis. The parabolic square-law behaviour is the dependence of ID on \(V_{GS}\) — the transfer characteristic — not on \(V_{DS}\). Option 3 describes the ohmic region below pinch-off, where the device does behave as a resistor.

In practice the saturation is not perfectly flat. Channel-length modulation gives a slight upward slope, modelled as

\(I_{D}=I_{DSS}\left(1-\dfrac{V_{GS}}{V_{P}}\right)^{2}\left(1+\lambda V_{DS}\right)\)

whose reciprocal \(1/\lambda\) is the Early voltage — the finite output resistance that limits the gain of a FET amplifier.

The consequence for circuit design is that a JFET biased in saturation is a well-behaved amplifier: its drain current depends on the input and not on the load, so the voltage gain \(A_{V}=-g_{m}R_{D}\) is set by the designer's choice of RD.

Hence, above pinch-off the drain current remains constant.

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Similar Questions

  1. List – I (Structure/Characteristics)List – II (Reasons)  
    a. n-channel JFET is better than p-channel JFETi. Reverse bias increases along the channel
    b. Channel is wedge shapedii. High electric field near the drain and directed towards source
    c. Channel is not completely closed at pinch-offiii. Low leakage current at the gate terminal
    d. Input impedance is highiv. Better frequency performance since μn >> μp

    Codes :


Important Questions from Operation of JFET

  1. A junction Field Effect Transistor can operate in

  2. In a junction field effect transistor the depletion layer width at a distance x from the source is:

  3. The ohmic resistance of JFET with $V_p = 4V$ and $I_{DSS} = 10mA$ is
  4. Which of the following statements are correct for an N channel FETs?
    A. N channel FET has larger electron mobility than P channel FETs.
    B. N channel FET has electrons as current carriers.
    C. N channel FET has more noise than P channel FET.
    D. N channel FET has larger transconductance than P channel FETs.
    Choose the correct answer from the options given below:

  5. List – I (Structure/Characteristics)List – II (Reasons)  
    a. n-channel JFET is better than p-channel JFETi. Reverse bias increases along the channel
    b. Channel is wedge shapedii. High electric field near the drain and directed towards source
    c. Channel is not completely closed at pinch-offiii. Low leakage current at the gate terminal
    d. Input impedance is highiv. Better frequency performance since μn >> μp

    Codes :

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