Calculating Effective Memory Access Time with TLB

Let's break down how to calculate the overall memory access time when a Translation Lookaside Buffer (TLB) is involved. The TLB is a special cache that stores recent translations of virtual page numbers to physical frame numbers, speeding up address translation.

Understanding the Given Parameters

• Main Memory Access Time: This is the time it takes to access data directly from the main memory. Given as 400 \(\mu\)s.
• TLB Access Time: This is the time it takes to search the TLB. Given as 50 \(\mu\)s.
• TLB Hit Rate: This is the percentage of times the required page translation is found in the TLB. Given as 90%.

Calculating TLB Miss Rate

The TLB miss rate is the percentage of times the required page translation is not found in the TLB. It is calculated as:

\( \text{Miss Rate} = 1 - \text{Hit Rate} \)

Given the hit rate is 90% (or 0.90), the miss rate is:

\( \text{Miss Rate} = 1 - 0.90 = 0.10 \)

So, the miss rate is 10%.

Determining Overall Access Time (Effective Access Time - EAT)

The overall access time, often called the Effective Access Time (EAT), depends on whether a TLB hit occurs or a TLB miss occurs.

• Case 1: TLB Hit

  If the translation is found in the TLB (TLB hit), the steps are:

  1. Access the TLB: Takes 50 \(\mu\)s.
  2. Find the physical address directly from the TLB.
  3. Access the data in main memory using the physical address: Takes 400 \(\mu\)s.

  Total time for a TLB hit: TLB Access Time + Main Memory Access Time = 50 \(\mu\)s + 400 \(\mu\)s = 450 \(\mu\)s.

• Case 2: TLB Miss

  If the translation is not found in the TLB (TLB miss), the steps are:

  1. Access the TLB: Takes 50 \(\mu\)s. (This is where the miss is detected)
  2. Access the page table in main memory to find the physical address: Takes 400 \(\mu\)s.
  3. Once the physical address is found in the page table (which is in main memory), access the data in main memory: Takes another 400 \(\mu\)s.

  Total time for a TLB miss: TLB Access Time + Main Memory Access Time (for page table) + Main Memory Access Time (for data) = 50 \(\mu\)s + 400 \(\mu\)s + 400 \(\mu\)s = 850 \(\mu\)s.

  This can also be written as: TLB Access Time + 2 \(\times\) Main Memory Access Time.

Formula for Effective Access Time (EAT)

The EAT is the weighted average of the access times for hits and misses:

\( EAT = (\text{Hit Rate} \times \text{Time for Hit}) + (\text{Miss Rate} \times \text{Time for Miss}) \)

Substituting the values:

\( EAT = (0.90 \times (50 \ \mu\text{s} + 400 \ \mu\text{s})) + (0.10 \times (50 \ \mu\text{s} + 400 \ \mu\text{s} + 400 \ \mu\text{s})) \)

\( EAT = (0.90 \times 450 \ \mu\text{s}) + (0.10 \times 850 \ \mu\text{s}) \)

Performing the Calculation Step-by-Step

Calculate the contribution from TLB hits:

\( 0.90 \times 450 \ \mu\text{s} = 405 \ \mu\text{s} \)

Calculate the contribution from TLB misses:

\( 0.10 \times 850 \ \mu\text{s} = 85 \ \mu\text{s} \)

Add the contributions to find the total EAT:

\( EAT = 405 \ \mu\text{s} + 85 \ \mu\text{s} \)

\( EAT = 490 \ \mu\text{s} \)

Thus, the overall memory access time considering the TLB hit rate is 490 \(\mu\)s.

Revision Table: Memory Access Time Calculation

Additional Information: TLB and Virtual Memory

The TLB is a crucial component in systems that use virtual memory. Virtual memory allows a process to use more memory than is physically available in the main memory. It divides memory into fixed-size blocks called pages (in virtual memory) and frames (in physical memory).

• Page Table: This is a data structure stored in main memory that maps virtual page numbers to physical frame numbers. Every memory access requires looking up this table, which is slow because it involves a main memory access.
• TLB Purpose: The TLB acts as a cache for the page table entries. It stores the most recently used translations. By checking the TLB first, the system can avoid a main memory access for the page table lookup in most cases (when there is a TLB hit).
• Performance Impact: A high TLB hit rate significantly reduces the effective memory access time because accessing the TLB is much faster than accessing the main memory page table. A low hit rate means more page table lookups, increasing the overall time.
• Context Switching: On a context switch (when the CPU switches from one process to another), the TLB usually needs to be flushed or marked appropriately because the virtual-to-physical address mappings are specific to each process.