Note: 1K=$2^{10}$
Initial Memory State
The system starts with the following memory holes:
- 20 KB
- 4 KB
- 25 KB
- 18 KB
- 7 KB
- 9 KB
- 15 KB
- 12 KB
Process P1 Allocation (16 KB) using Best-Fit
The Best-Fit algorithm selects the smallest hole that is large enough to accommodate the process.
- Holes large enough for P1 (>= 16 KB): 20 KB, 25 KB, 18 KB.
- The smallest among these is the 18 KB hole.
- P1 is allocated 16 KB from the 18 KB hole.
- The remaining size of this hole becomes: $18 \text{ KB} - 16 \text{ KB} = 2 \text{ KB}$.
Memory state after P1 allocation:
- 20 KB
- 4 KB
- 25 KB
- 2 KB (updated from 18 KB)
- 7 KB
- 9 KB
- 15 KB
- 12 KB
Process P2 Allocation (9 KB) using Best-Fit
The Best-Fit algorithm is applied again for P2.
- Current holes: {20, 4, 25, 2, 7, 9, 15, 12} KB.
- Holes large enough for P2 (>= 9 KB): 20 KB, 25 KB, 9 KB, 15 KB, 12 KB.
- The smallest among these is the 9 KB hole.
- P2 is allocated 9 KB from the 9 KB hole.
- The remaining size of this hole becomes: $9 \text{ KB} - 9 \text{ KB} = 0 \text{ KB}$. This hole is effectively removed.
Memory state after P2 allocation:
- 20 KB
- 4 KB
- 25 KB
- 2 KB
- 7 KB
- 15 KB
- 12 KB
Counting Holes Less Than 8 KB
Identify and count the holes with a size strictly less than 8 KB from the final list.
- Final Holes: {20, 4, 25, 2, 7, 15, 12} KB.
- Holes less than 8 KB are: 4 KB, 2 KB, and 7 KB.
- Total count = 3.
The number of holes of size less than 8 KB after allocating P1 and P2 is 3.
Important Questions from Memory Management
- A system has a Translation Lookaside Buffer (TLB) that has a reach of 1 MB. TLB reach is defined as the total amount of physical memory that can be accessed through the TLB entries. The paging system uses pages of size 4 KB. The virtual address space is 64 GB and physical address space is 1 GB. If each TLB entry stores a 4-bit process id, page number, frame number, and a 2-bit control field, then the size of the TLB (in bytes) is ___________. (answer in integer)
Note: 1K=$2^{10}$, 1M=$2^{20}$, 1G=$2^{30}$ - Match List I with List II
List I List II A. Clustered Page Table I. Generally considered inappropriate for 64 bit architectures. B. Hierarchical Page Table II. Has only entry for each real page (or frame) of memory. C. Segmentation III. Useful for Sparse address spaces. D. Inverted Page Table IV. Supports a user view of the system.
Choose the correct answer from the options given below: - Choose the correct answer.
In memory management, page size is always, power of 2. Which of the following is a type of memory and is similar to RAM?
200 μs should be the memory size of a digital storage oscilloscope to be able to record a transient of 10 seconds with a time resolution of 200 μs?
