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Question

Which of the following memories uses one transistor and one capacitor as a basic memory unit

The correct answer is

DRAM

Understanding Memory Unit Components

Computer memory is crucial for storing data and instructions that the CPU needs to access quickly. Different types of Random Access Memory (RAM) have varying internal structures, particularly regarding their basic memory units, also known as memory cells. The question specifically asks about a memory type that uses one transistor and one capacitor as its fundamental building block.

DRAM: One Transistor and One Capacitor

DRAM stands for Dynamic Random Access Memory. It is characterized by its simple and compact memory cell design. Each basic memory unit in DRAM consists of:

  • One Transistor: This acts as a switch, controlling the flow of charge to and from the capacitor. When the transistor is "on," it allows data to be written to or read from the capacitor.
  • One Capacitor: This component is responsible for storing the electrical charge, which represents a single bit of data (a '1' if charged, a '0' if discharged).

The term "dynamic" in DRAM refers to the fact that capacitors naturally leak their charge over time. Therefore, the data stored in a DRAM cell needs to be periodically "refreshed" by reading its content and then rewriting it. This refreshing process is managed by a memory controller.

Due to its simple cell structure, DRAM offers a high storage density, meaning more memory cells can be packed into a smaller area, making it a cost-effective choice for main system memory (RAM) in computers.

SRAM: Multiple Transistors for Speed

SRAM stands for Static Random Access Memory. Unlike DRAM, SRAM does not use capacitors to store data. Instead, it relies on a more complex arrangement of transistors to form a flip-flop, which can hold a bit of data as long as power is supplied.

A typical basic memory unit in SRAM consists of:

  • Four to Six Transistors: Commonly, an SRAM cell uses six transistors. Four transistors form two cross-coupled inverters to hold the data, and two additional transistors are used as access transistors to control reading and writing operations.

The term "static" refers to the fact that SRAM does not need to be refreshed periodically, unlike DRAM, because the flip-flop circuit will maintain its state as long as power is provided. This characteristic makes SRAM significantly faster than DRAM.

However, the more complex cell structure (more transistors per bit) means that SRAM cells are larger than DRAM cells. This results in lower storage density and higher manufacturing costs, which is why SRAM is typically used for smaller, faster memory caches within the CPU rather than main system memory.

Comparing DRAM and SRAM Memory Units

To summarize the key differences related to their basic memory unit design:

Feature DRAM SRAM
Basic Memory Unit One transistor & one capacitor Four to six transistors (no capacitor)
Refresh Required Yes (dynamic) No (static)
Speed Slower Faster
Density Higher Lower
Cost Lower per bit Higher per bit
Typical Use Main system memory (RAM) CPU cache memory

Conclusion on Memory Unit Design

Based on the detailed analysis of their basic memory unit structures, it is clear that DRAM is the type of memory that uses one transistor and one capacitor per memory cell. This design allows for high density and lower cost, making it ideal for the main memory in most computer systems.

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Important Questions from Memory Address and Capacity

  1. A single unit which is composed of small group of bits is known as-

  2. Minimum number of bits needed to address 2000 memory location are

  3. _______ register in a PC holds the address of the location to be accessed.

  4. Addressing of a 32K × 16 memory is realized using a single decoder. The minimum number of AND gates required for the decoder is

  5. An 8 Kbyte ROM with an active low Chip Select input\(\left( {\overline {{\rm{CS}}} } \right)\) is to be used in an 8085 microprocessor-based system. The ROM should occupy the address range 1000H to 2FFFH. The address lines are designated as 𝐴15 to 𝐴0, where 𝐴15 is the most significant address bit. Which one of the following logic expressions will generate the correct \(\overline {{\rm{CS}}}\) signal for this ROM?

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