Which of the following addressing mode is best suited to access elements of an array of contiguous memory locations ?
Indexed addressing mode
Addressing modes in computer architecture define how the operand of an instruction is specified. When dealing with data structures like arrays stored in contiguous memory locations, selecting the appropriate addressing mode is crucial for efficient access.
An array stores elements of the same data type sequentially in memory. If the array starts at a base address $B$, and each element has a size $S$, the address of the $i$-th element (using 0-based indexing) is typically calculated as $B + i \times S$. We need an addressing mode that can effectively compute this address.
Let's examine the given addressing modes and their suitability for accessing contiguous array elements:
Based on the analysis, Indexed addressing mode directly supports the calculation $B + i \times S$ required for accessing the $i$-th element of a contiguous array. The base address is provided, and the index (often in a register) is used directly in the address calculation, often with built-in scaling based on the data type size.
| Addressing Mode | Effective Address Calculation | Suitability for Contiguous Array Access |
|---|---|---|
| Indexed | Base Address + Index $\times$ Scale | Highly Suitable (Directly supports array element address calculation) |
| Base Register | Base Register + Displacement | Less Suitable (Displacement is fixed, not directly index-based) |
| Relative | PC + Displacement | Not Suitable (PC-relative, not for array element access) |
| Displacement (Base + Displacement) | Base Address + Displacement | Less Suitable (Similar to Base Register mode) |
Therefore, the Indexed addressing mode is best suited for efficiently accessing elements of an array stored in contiguous memory locations because its address calculation mechanism directly aligns with how array element addresses are computed.
| Mode Name | Description | Use Case | |||
|---|---|---|---|---|---|
| Immediate | Operand is part of the instruction. | Loading constants into registers. | |||
| Direct | Instruction contains the full memory address. | Accessing fixed memory locations. | |||
| Register | Operand is in a register. | Fast access to values in CPU registers. | Indexed | Base Address + Index $\times$ Scale. | Accessing array/table elements. |
| Register Indirect | Register contains the memory address. | Implementing pointers. |
Indexed addressing mode is specifically designed to handle data structures like arrays. It allows for easy iteration through array elements by simply incrementing or decrementing the index register. Many architectures also include hardware support for scaling the index by the element size (e.g., 1, 2, 4, 8 bytes), making the calculation $Base + Index \times Scale$ very fast, often performed within the memory access cycle itself. This hardware support is what makes Indexed addressing particularly efficient for array processing compared to modes like Base Register + Displacement, which would require extra instructions to calculate the correct displacement for each element or manage the base address dynamically.
An instruction is stored at location 500 with its address field at location 501. The address field has the value 400. A processor register R 1contains the number 200. Match the addressing mode (List-I) given below with effective address (List-II) for the given instruction.
List I | List II | ||
a. | Direct | i. | 200 |
b. | Register indirect | ii. | 902 |
c. | Index with R 1as the index register | iii. | 400 |
d. | Relative | iv. | 600 |
Choose the correct option from those given below: