An instruction is stored at location 500 with its address field at location 501. The address field has the value 400. A processor register R 1contains the number 200. Match the addressing mode (List-I) given below with effective address (List-II) for the given instruction. List I List II a. Direct i. 200 b. Register indirect ii. 902 c. Index with R 1as the index register iii. 400 d. Relative iv. 600 Choose the correct option from those given below:
a – iii, b – i, c – iv, d - ii
This problem requires us to determine the effective memory address used by an instruction based on different addressing modes. We are given the instruction's location, the location and value of its address field, and the content of a processor register R1.
The given information is:
Let's analyze each addressing mode listed and calculate the effective address.
In Direct Addressing mode, the address field of the instruction contains the effective address of the operand directly.
\( \text{Effective Address (EA)} = \text{Address Field Value} \)
Given that the address field value is 400:
\( \text{EA}_{\text{Direct}} = 400 \)
This matches option 'iii' in List-II.
In Register Indirect Addressing mode, the address field typically specifies a register whose content is the effective address. However, based on the provided options and standard interpretations in such problems, this often means the effective address is the content of a designated register, which in this case is R1.
\( \text{Effective Address (EA)} = \text{Content of Register R1} \)
Given that the content of register R1 is 200:
\( \text{EA}_{\text{Register Indirect}} = 200 \)
This matches option 'i' in List-II.
In Index Addressing mode, the effective address is calculated by adding the value in the address field (often called the base address or displacement) to the content of an index register. Here, R1 is specified as the index register.
\( \text{Effective Address (EA)} = \text{Address Field Value} + \text{Content of Index Register (R1)} \)
Given the address field value is 400 and the content of R1 is 200:
\( \text{EA}_{\text{Index}} = 400 + 200 = 600 \)
This matches option 'iv' in List-II.
In Relative Addressing mode, the effective address is calculated relative to the current value of the Program Counter (PC). The address field typically contains an offset that is added to the PC. The PC usually points to the instruction currently being executed or the next instruction to be fetched, depending on the architecture. Assuming a typical architecture where the PC increments after fetching the instruction, it would point to the address immediately following the current instruction. The instruction is at location 500, and its address field is at 501. Assuming the instruction takes 2 memory locations (e.g., opcode at 500, address field at 501), the next instruction would start at 502.
\( \text{Effective Address (EA)} = \text{Address of Next Instruction (PC)} + \text{Offset (Address Field Value)} \)
Given the address field value (offset) is 400 and the address of the next instruction (PC) is assumed to be 502:
\( \text{EA}_{\text{Relative}} = 502 + 400 = 902 \)
This matches option 'ii' in List-II.
Based on our calculations:
The correct matching is:
| Addressing Mode | List-I | Calculation Based on Problem | Effective Address (EA) | List-II Match |
|---|---|---|---|---|
| Direct | a | Address Field Value | 400 | iii |
| Register Indirect | b | Content of R1 | 200 | i |
| Index with R1 | c | Address Field Value + Content of R1 | 400 + 200 = 600 | iv |
| Relative | d | Address of Next Instruction (PC) + Address Field Value | 502 + 400 = 902 | ii |
Addressing modes are crucial for computer architecture as they determine how the operand of an instruction is accessed. Different modes offer flexibility in programming and impact performance.
Understanding these modes helps in comprehending how processors fetch and process data and instructions from memory.
Which of the following addressing mode is best suited to access elements of an array of contiguous memory locations ?