Understanding Micro-instruction Format Size

Let's break down the structure of the micro-instruction described in the question and calculate its total size in bits. The size of a micro-instruction is determined by the total number of bits required for all its fields.

Analyzing the Micro-instruction Fields

The micro-instruction format consists of the following fields:

• Micro-ops field (divided into F1, F2, F3)
• Condition field (CD)
• Branch field (BR)
• Address field (ADF)

Calculating Bits for Each Field

We need to determine the number of bits required for each field based on the number of distinct options or addresses it needs to represent.

1. Micro-ops Field (F1, F2, F3):

• Each subfield (F1, F2, F3) has seven distinct micro-operations.
• To represent 7 distinct operations, we need enough bits such that $2^{\text{number of bits}} \ge 7$.
• The smallest integer number of bits that satisfies this is $\lceil \log_2 7 \rceil$. Since $2^2 = 4$ and $2^3 = 8$, we need 3 bits to represent 7 distinct options.
• So, F1 requires 3 bits, F2 requires 3 bits, and F3 requires 3 bits.
• Total bits for the Micro-ops field = Bits for F1 + Bits for F2 + Bits for F3 = $3 + 3 + 3 = 9$ bits.

2. Condition Field (CD):

• The CD field is for four status bits. This means it can represent 4 distinct conditions or states.
• To represent 4 distinct conditions, we need enough bits such that $2^{\text{number of bits}} \ge 4$.
• The smallest integer number of bits is $\lceil \log_2 4 \rceil = 2$ bits.
• So, the CD field requires 2 bits.

3. Branch Field (BR):

• The BR field has four options.
• To represent 4 distinct options, we need enough bits such that $2^{\text{number of bits}} \ge 4$.
• The smallest integer number of bits is $\lceil \log_2 4 \rceil = 2$ bits.
• So, the BR field requires 2 bits.

4. Address Field (ADF):

• The address space is of 128 memory locations.
• The ADF field is used in conjunction with the branch field to specify the next micro-instruction address.
• To address 128 distinct memory locations, we need enough bits such that $2^{\text{number of bits}} \ge 128$.
• The smallest integer number of bits is $\lceil \log_2 128 \rceil = 7$ bits, since $2^7 = 128$.
• So, the ADF field requires 7 bits.

Calculating Total Micro-instruction Size

The total size of the micro-instruction is the sum of the bits required for all its fields:

Total Size = Micro-ops (F1+F2+F3) + CD + BR + ADF

Total Size = $9 \text{ bits} + 2 \text{ bits} + 2 \text{ bits} + 7 \text{ bits}

Total Size = $20 \text{ bits}$

Therefore, the size of the micro-instruction is 20 bits.

Revision Table: Key Concepts in Micro-instruction Design

Additional Information: Microprogramming and Control Unit Design

Microprogramming is a technique used in the design of control units for processors. Instead of hardwiring the control logic, the control signals are generated by executing a sequence of micro-instructions stored in a special memory called control memory.

The structure of a micro-instruction significantly impacts the complexity and speed of the control unit. Different field structures allow for different types of control operations:

• Functional Control Fields: Like F1, F2, F3 in this example, they directly control specific data path operations (like ALU operations, register transfers). Having multiple such fields allows for parallel execution of micro-operations (horizontal microprogramming).
• Condition Fields: The CD field selects which status bit (e.g., Zero flag, Carry flag) is to be tested. This test result is often used to make a branching decision in the microprogram.
• Branch Fields: The BR field specifies the type of branching to be performed, such as conditional branch, unconditional jump, or call subroutine.
• Address Fields: The ADF field provides the address of the next micro-instruction to be fetched from control memory, especially important for jump or call instructions. In conditional branches, this address might be used or ignored based on the condition test result.

The size of the address field is determined by the total number of micro-instructions stored in the control memory, which defines the address space.