A micro instruction format has micro operation field which is divided into 2 subfields F1 and F2, each having 15 distinct microoperations, condition field CD for four status bits, branch field BR having four options used in conjunction with address field AD. The address space is of 128 memory words. The size of micro instruction is:

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Understanding Micro Instruction Format and Size Calculation

A micro instruction is a low-level instruction that controls the operation of the functional units within a processor. The size of a micro instruction is determined by the number of bits required to represent all its fields. Let's break down the given micro instruction format and calculate its size field by field.

Calculating Field Sizes

The micro instruction format described has the following fields:

Micro operation field (divided into F1 and F2)
Condition field (CD)
Branch field (BR)
Address field (AD)

Micro Operation Fields (F1 and F2)

The micro operation field is split into two subfields, F1 and F2. Each subfield can represent 15 distinct microoperations.

For F1, to represent 15 distinct operations, we need a minimum number of bits, $n_1$, such that $2^{n_1} \ge 15$. The smallest integer $n_1$ satisfying this is 4, since $2^3 = 8$ and $2^4 = 16$. So, F1 requires 4 bits.
For F2, similarly, to represent 15 distinct operations, we need a minimum number of bits, $n_2$, such that $2^{n_2} \ge 15$. This also requires 4 bits.

Total bits for the micro operation fields (F1 + F2) = $4 + 4 = 8$ bits.

Condition Field (CD)

The condition field CD is used for four status bits. This means it selects one of four possible conditions based on status flags. To select one of four options, we need a minimum number of bits, $n_{CD}$, such that $2^{n_{CD}} \ge 4$. The smallest integer $n_{CD}$ satisfying this is 2, since $2^2 = 4$. So, CD requires 2 bits.

Branch Field (BR)

The branch field BR has four options. These options likely determine the type of branching (e.g., conditional branch, unconditional jump, call, return). To select one of four options, we need a minimum number of bits, $n_{BR}$, such that $2^{n_{BR}} \ge 4$. The smallest integer $n_{BR}$ satisfying this is 2. So, BR requires 2 bits.

Address Field (AD)

The address field AD is used in conjunction with the branch field. The address space is 128 memory words. To address 128 distinct memory words, we need a minimum number of bits, $n_{AD}$, such that $2^{n_{AD}} \ge 128$. The smallest integer $n_{AD}$ satisfying this is 7, since $2^7 = 128$. So, AD requires 7 bits.

Summary of Field Sizes

Let's summarize the bit requirements for each field in the micro instruction format:

Field	Description	Number of Options/Addresses	Bits Required
F1	Micro operation subfield 1	15 distinct operations	4 ($\lceil \log_2 15 \rceil$)
F2	Micro operation subfield 2	15 distinct operations	4 ($\lceil \log_2 15 \rceil$)
CD	Condition field	4 status bits (options)	2 ($\lceil \log_2 4 \rceil$)
BR	Branch field	4 options	2 ($\lceil \log_2 4 \rceil$)
AD	Address field	128 memory words	7 ($\lceil \log_2 128 \rceil$)

Total Micro Instruction Size Calculation

The total size of the micro instruction is the sum of the bits required for all its fields:

Total Size = Bits(F1) + Bits(F2) + Bits(CD) + Bits(BR) + Bits(AD)

Total Size = $4 + 4 + 2 + 2 + 7 = 19$ bits.

Therefore, the size of the micro instruction is 19 bits.

Revision Table: Key Concepts in Micro Instructions

Concept	Description	Relevance to Size
Micro Instruction	A control word that specifies one or more microoperations to be performed during a single clock cycle.	The length of this word determines the instruction size.
Micro Operation	An elementary operation performed on data stored in registers, e.g., transfer, arithmetic, logic, shift.	The number of distinct microoperations determines the bits needed for micro operation fields.
Control Memory	Memory that stores the sequence of micro instructions (microprogram).	The address space of the control memory determines the bits needed for address/branch fields that reference control memory locations.
Status Bits (Condition Codes)	Bits in a status register that reflect the outcome of operations (e.g., Zero, Negative, Carry, Overflow).	The number of status bits used for conditional branching determines the bits needed for the condition field.

Additional Information on Micro Instruction Design

Micro instruction design involves deciding the format and the micro operations. There are generally two types of micro instruction formats:

Horizontal Micro Instructions: These are typically longer and allow multiple micro operations to be performed in parallel within a single instruction. They have separate control fields for different functional units. This often leads to wider instructions but potentially faster execution due to parallelism.
Vertical Micro Instructions: These are typically shorter and resemble machine language instructions. They specify a single micro operation per instruction. They require a decoder to translate the encoded micro operation field into control signals. This leads to narrower instructions but sequential execution of micro operations.

The format given in the question, with multiple fields for micro operations, conditions, and branching, is characteristic of a horizontal or slightly vertical (partially encoded) approach, where different aspects of the processor's control are specified by distinct fields.

The size of the micro instruction directly impacts the size of the control memory needed to store the microprogram. A larger micro instruction size means fewer micro instructions can be stored in a control memory of a fixed capacity, but each instruction can potentially command more complex or parallel actions.

Prepp Team · Answer

18

Prepp Team · Answer

17

Prepp Team · Answer

20

Location	Instruction
010	CLA
011	ADD 016
012	BUN 014
013	HLT
014	AND 017
015	BUN 013
016	C1A5
017	93C6