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Question

8086 is interfaced to two 8259s (programmable interval timer). If 8259s are in master slave configuration, the number of interrupts available to the 8086 microprocessor is

The correct answer is
16

Understanding 8259 Master-Slave Configuration

The 8259 Programmable Interrupt Controller (PIC) is a chip used to manage hardware interrupts. A single 8259 PIC can handle up to 8 distinct interrupt requests (IR lines).

When two 8259 PICs are used with the 8086 microprocessor in a master-slave configuration, one PIC acts as the master and the other as the slave. This setup allows for cascading interrupts.

Calculating Total Available Interrupts

The master 8259 PIC has 8 interrupt request lines. The slave 8259 PIC also has 8 interrupt request lines.

In the master-slave configuration, the total number of interrupts is the sum of interrupts handled directly by the master and those handled by the slave.

The calculation is as follows:

$ \text{Total Interrupts} = (\text{Interrupts on Master}) + (\text{Interrupts on Slave}) $ $ \text{Total Interrupts} = 8 + 8 $ $ \text{Total Interrupts} = 16 $

Therefore, with two 8259s in a master-slave configuration, the 8086 microprocessor can handle a total of 16 interrupts.

This corresponds to Option B.

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