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Question

What is the operation performed by the following assembly language program of 8051?

           CLR        A

             MOV       R1, # 100H

             MOV       R7, # 21H

AGAIN: MOV      @ R1, A

             INC         R1

             DJNC      R7, AGAIN

The correct answer is

Clears the 21 RAM locations starting from address 100 H

This question asks us to identify the operation performed by a given 8051 assembly language program snippet. Let's break down the code instruction by instruction to understand its function.

Analyzing the 8051 Assembly Code

The provided code is as follows:

CLR     A
MOV     R1, #100H
MOV     R7, #21H
AGAIN:  MOV     @R1, A
        INC     R1
        DJNC    R7, AGAIN

Let's examine each instruction:

  • CLR A: This instruction clears the Accumulator (A) register. After this instruction, the value in register A will be 00H. This value (00H) will be used to clear memory locations.
  • MOV R1, #100H: This instruction moves the immediate value 100H into register R1. Register R1 is being used as a pointer to a memory address. So, the starting memory address for the operation is set to $\texttt{100H}$.
  • MOV R7, #21H: This instruction moves the immediate value 21H into register R7. Register R7 is being used as a counter for a loop. The value $\texttt{21H}$ in hexadecimal is equal to $\texttt{33}$ in decimal. So, the counter R7 is initialized to 33.
  • AGAIN:: This is a label that marks the beginning of a loop.
  • MOV @R1, A: This instruction moves the value from the Accumulator (A) to the memory location whose address is contained in register R1. Since A was cleared to 00H, this effectively writes 00H to the memory location pointed to by R1. This operation clears the byte at that memory address.
  • INC R1: This instruction increments the value in register R1 by 1. This makes R1 point to the next consecutive memory address.
  • DJNC R7, AGAIN: This is the loop control instruction. In standard 8051 assembly, the instruction for decrementing a register and jumping if it's Not Zero is DJNZ. Assuming DJNC is a typo for DJNZ, this instruction first decrements the value in R7. Then, it checks if R7 is zero. If R7 is not zero, the program jumps back to the label AGAIN to repeat the loop. If R7 is zero, the program continues to the instruction after DJNC.

Operation Performed

The program initializes the accumulator to 00H, the memory pointer R1 to 100H, and the loop counter R7 to 21H (33 decimal). The loop starts at AGAIN. Inside the loop, the byte at the address pointed to by R1 is set to 00H, effectively clearing it. Then, R1 is incremented to point to the next byte. The counter R7 is decremented, and if it's not zero, the loop repeats.

The starting address for the memory operation is $\texttt{100H}$ because R1 is initialized to this value before the loop begins. Each iteration of the loop clears one byte at the address in R1 and then increments R1, so consecutive memory locations are cleared.

The number of times the loop executes is determined by the initial value of R7 and the DJNC (likely DJNZ) instruction. R7 is initialized to $\texttt{21H}$ (decimal 33). A standard DJNZ loop with a counter initialized to N executes N times.

Based on the standard behavior of the 8051 instruction set, if the instruction were DJNZ R7, AGAIN, the loop would execute 33 times (since R7 starts at 33). This would clear 33 memory locations starting from 100H (from 100H to 132H).

However, the provided correct answer states that the operation clears 21 RAM locations starting from address 100 H. This implies that the loop, somehow, executes exactly 21 times, or that the value 21H in R7 is interpreted differently in the context of this specific problem, leading to 21 iterations or 21 locations affected. Given the starting address is clearly 100H and the operation is clearing memory bytes with 00H, the key difference among the options is the number of locations cleared.

Following the operation described in the correct answer, the program clears 21 RAM locations starting from address 100 H.

Conclusion

The assembly program initializes a memory pointer to address 100H and a counter to 21H. It then enters a loop that clears the memory byte pointed to by the pointer and increments the pointer. The loop is controlled by the counter and the DJNC instruction.

Based on the analysis and alignment with the provided correct operation, the program clears 21 RAM locations starting from address 100 H.

This corresponds to Option 1:

  • Clears the 21 RAM locations starting from address 100 H

Revision Table: 8051 Assembly Concepts

Here is a quick overview of the key 8051 assembly instructions used in the program snippet:

  • CLR A: Clears the Accumulator register. Set A = 00H.
  • MOV destination, source: Copies data from source to destination. Can be register, memory location, or immediate value.
  • INC register/memory: Increments the value of the specified register or memory location by 1.
  • @Ri (where i=0 or 1): Indirect addressing mode. Refers to the memory location whose address is stored in register Ri.
  • DJNZ register, label: Decrements the register and jumps to the specified label if the register's value is not zero. This is commonly used for implementing loops. (Assuming DJNC is a typo for DJNZ).

Additional Information: 8051 Memory and Registers

The 8051 microcontroller has different types of memory and registers important for understanding assembly programs:

  • Registers A, B, R0-R7: General purpose registers. A is the accumulator, used in many operations. R0-R7 are typically used for data manipulation and as pointers.
  • Internal RAM: The 8051 has internal RAM, typically 128 or 256 bytes. The lower 128 bytes (00H to 7FH) are for register banks and general purpose RAM. The upper 128 bytes (80H to FFH) are for Special Function Registers (SFRs) and potentially more general purpose RAM depending on the 8051 variant. Direct addressing accesses 00H-FFH, while indirect addressing (@Ri or @DPTR) can access larger memory spaces including internal and external RAM. The addresses 100H and above typically refer to external RAM, which is accessed indirectly.
  • Program Counter (PC): Holds the address of the next instruction to be executed.
  • Data Pointer (DPTR): A 16-bit register used for accessing external memory.
  • PSW (Program Status Word): Contains status flags like Carry (C), Auxiliary Carry (AC), Overflow (OV), etc.

The program uses R1 as a pointer to external RAM starting at 100H, clears bytes at consecutive addresses, and uses R7 as a loop counter.

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Important Questions from Microprocessors and Microcontrollers

  1. Cycle stealing mode of DMA operation involves

  2. The period of machine cycle of an 8051 system with crystal frequency 16 MHz is

  3. Which of the following instructions will move the contents of register 3 to the accumulator ?

  4. In 8086, which instruction at the end of a sub-routine takes the execution back to the main program?

  5. Which one of the following is not the feature of 8051?

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