The minimum number of 2-input NAND gates required to realize the logic function $Y = AB + \bar A \bar B$ is
5
The given logic function is $Y = AB + \bar A \bar B$. This expression is equivalent to the XNOR operation between inputs A and B, denoted mathematically as $Y = A \odot B$. The question asks for the minimum number of 2-input NAND gates required to implement this XNOR function.
We need to find the most efficient way to build the XNOR logic using only 2-input NAND gates. It's a known result in digital logic design that the XNOR function requires a specific minimum number of NAND gates.
A standard implementation of the XNOR function ($A \odot B$) using 2-input NAND gates requires exactly 5 gates. The steps are as follows:
This sequence uses exactly 5 distinct 2-input NAND gates.
The implementation of fundamental logic functions using only 2-input NAND gates follows established minimum counts:
Since the function $Y = AB + \bar A \bar B$ is the XNOR operation, the theoretical minimum number of 2-input NAND gates required is 5.
Based on the standard implementation and the known minimum counts for logic gates using NAND equivalents, the minimum number of 2-input NAND gates required for the function $Y = AB + \bar A \bar B$ is 5.
The number of distinct Boolean expressions of four variables is-
Which of the following types is best suited to represent the logical values?
In the given circuit, if the input voltage lies between +E1 and -E2, then output is zero.

Input and output characteristics are shown below.

The region between +E1 and -E2 is known as _____.
A*B*A, where * represents XOR, is equal to:
The theorem to which the given two powerful laws in Boolean algebra belong to, is:
Law 1:\(\overline{A + B} = \overline A \ \overline B\)
Law 2:\(\overline{A B} = \overline A \ + \overline B\)