Suppose a program is running on a non-pipelined single processor computer system. The computer is connected to an external device that can interrupt the processor asynchronously. The processor needs to execute the interrupt service routine (ISR) to serve this interrupt. The following steps (not necessarily in order) are taken by the processor when the interrupt arrives: (i) The processor saves the content of the program counter. Which ONE of the following is the CORRECT sequence of steps?
(ii) The program counter is loaded with the start address of the ISR.
(iii) The processor finishes the present instruction.
This question asks about the correct order of operations a processor performs when handling an interrupt signal from an external device on a system without pipelining.
When an asynchronous interrupt occurs, the processor needs to pause its current task, handle the interrupt via the Interrupt Service Routine (ISR), and then potentially resume the original task.
Here's a breakdown of the steps involved:
On a non-pipelined system, the processor generally completes the instruction it is currently executing before responding to an interrupt. This ensures that the program's state is consistent and prevents data corruption. It allows the system to cleanly switch contexts.
After completing the current instruction, the processor needs to remember where it left off in the main program. The Program Counter (PC) holds the address of the next instruction to be executed. Saving the current value of the PC is crucial so that the processor can return to this exact point after the ISR has finished.
Once the return address (current PC value) is safely stored (often pushed onto a stack), the processor needs to start executing the code designed to handle the interrupt. This is the ISR. To do this, the PC is updated to point to the beginning of the ISR code.
Therefore, the logical sequence for the processor to handle the interrupt is to first finish the ongoing instruction, then save the program counter's current value, and finally, load the program counter with the starting address of the Interrupt Service Routine.
Based on the explanation above, the correct sequence is:
This corresponds to the sequence (iii), (i), (ii).
The register in the 8085A that is used to keep track of the memory address of the next op-code to be run in the program is the-
Match List-I with List-II
List I | List II | ||
a. | Micro operation | i. | Specify micro operations |
b. | Micro programmed control unit | ii. | Improve CPU utilization |
c. | Interrupts | iii. | Control Memory |
d. | Micro instruction | iv. | Elementary operation performed on data stored in registers |
Choose the correct option from those given below:
Disabling an interrupt is known as ______.
The clock tick interrupts, which wakes up the processor from a halt state and allows the scheduler to pick other work to perform, is an example of _______.
Which is not true about an interrupt