In asynchronous serial communication the sender and receiver do not share a common clock line, and there is no guarantee that the receiver can process bytes as fast as they arrive.

If the sender keeps transmitting while the receiver's input buffer is full, incoming bytes would be dropped, so a flow-control mechanism is needed.

Hardware handshaking provides this using dedicated control lines, typically RTS (Request To Send) and CTS (Clear To Send), separate from the data lines.

When the receiver's buffer is nearly full it deasserts its handshake line, signalling the sender to pause; once buffer space frees up, it reasserts the line and transmission resumes.

This pacing prevents the receiver's buffer from overflowing and losing data, so the role of hardware handshaking is To prevent data loss by managing buffer overflow.

Parity bits (not RTS/CTS) provide error detection, start/stop bits handle bit-level timing in asynchronous framing rather than synchronising internal clocks, and encryption is a security function unrelated to handshake signalling.