CMOS Inverter Output Shorted to Ground Explained

Understanding the behavior of a CMOS inverter when its output is accidentally shorted to ground is crucial in digital circuit design. A CMOS inverter is built using two complementary metal-oxide-semiconductor field-effect transistors (MOSFETs): a p-channel MOSFET (PMOS) acting as the pull-up device and an n-channel MOSFET (NMOS) acting as the pull-down device.

Analyzing the Short Circuit Condition

When the output of the CMOS inverter is directly connected (shorted) to ground ($0 \text{V}$), it creates a specific electrical situation depending on the inverter's input state:

• Input HIGH: In this state, the NMOS transistor is ON (conducting), and the PMOS transistor is OFF (non-conducting). The intended output is LOW, which is ground. The short circuit reinforces this state. The current flow is primarily through the NMOS to ground, which is its normal path. The PMOS is off, so it doesn't contribute to current flow from the supply ($V_{\text{DD}}$).
• Input LOW: In this state, the NMOS transistor is OFF, and the PMOS transistor is ON. The intended output is HIGH, connecting the output to the supply voltage ($V_{\text{DD}}$) through the PMOS. However, with the output shorted to ground, this creates a direct path from $V_{\text{DD}}$ to ground through the ON PMOS transistor.

Increased Current Drain and MOSFET Stress

The scenario where the input is LOW is the most critical. The direct path from $V_{\text{DD}}$ to ground through the PMOS transistor causes a significant amount of current to flow from the power supply. This results in:

• Increased Current Drain: The current drawn from the supply ($V_{\text{DD}}$) dramatically increases because the PMOS transistor is effectively acting like a resistor connecting $V_{\text{DD}}$ directly to ground.
• PMOS MOSFET Damage: This excessive current flow can cause the PMOS transistor to overheat. MOSFETs have limitations on the amount of current they can safely handle. Prolonged exposure to currents exceeding this limit can lead to thermal runaway and permanent damage to the p-channel MOSFET, potentially failing its gate or drain regions.

While the NMOS transistor is also part of the circuit, the primary stress due to a permanent output-to-ground short occurs when the PMOS is activated (input is LOW), creating the high current path from $V_{\text{DD}}$. Therefore, the p-channel load MOSFET is the component most likely to be damaged due to this fault condition.