A 3 - input majority gate is defined by the logic function \({\rm{M}}\left( {{\rm{a}},{\rm{b}},{\rm{c}}} \right) = {\rm{\;ab\;}} + {\rm{\;bc\;}} + {\rm{\;ac}}\) . Which one of the following gate is represented by the function \({\rm{M}}\left( {\overline {{\rm{M}}\left( {{\rm{a}},{\rm{b}},{\rm{c}}} \right)} ,{\rm{\;M}}\left( {{\rm{a}},{\rm{b}},\overline {{\rm{c\;}}} } \right),{\rm{c}}} \right)?\)
3 input EX-OR gate
Majority Gate Introduction
A 3-input majority gate, denoted as \({\rm{M}}\left( {{\rm{a}},{\rm{b}},{\rm{c}}} \right)\), is a fundamental logic gate in digital electronics. Its output is 1 if and only if more than half of its inputs are 1. For a 3-input majority gate, this means the output is 1 if at least two of its three inputs (a, b, c) are 1. The logic function for this gate is given as: \[{\rm{M}}\left( {{\rm{a}},{\rm{b}},{\rm{c}}} \right) = {\rm{ab\;}} + {\rm{bc\;}} + {\rm{ac}}\] Our task is to determine the logic gate represented by a more complex function derived from this majority gate: \({\rm{M}}\left( {\overline {{\rm{M}}\left( {{\rm{a}},{\rm{b}},{\rm{c}}} \right)} ,{\rm{\;M}}\left( {{\rm{a}},{\rm{b}},\overline {{\rm{c\;}}} } \right),{\rm{c}}} \right)\).
Evaluating the Complex Logic Function
To solve this, we need to evaluate the inner components of the expression and then use these values as inputs to the outer majority function. Let's define the three inputs to the outer \({\rm{M}}\) function as \({\rm{X}}\), \({\rm{Y}}\), and \({\rm{Z}}\):
\({\rm{X}} = \overline {{\rm{M}}\left( {{\rm{a}},{\rm{b}},{\rm{c}}} \right)}\)
\({\rm{Y}} = {\rm{M}}\left( {{\rm{a}},{\rm{b}},\overline {{\rm{c\;}}} } \right)\)
\({\rm{Z}} = {\rm{c}}\)
The final expression becomes \({\rm{M}}\left( {{\rm{X}},{\rm{Y}},{\rm{Z}}} \right) = {\rm{XY\;}} + {\rm{YZ\;}} + {\rm{XZ}}\).
Truth Table Analysis
The most systematic way to determine the resulting logic gate is by constructing a truth table for all possible combinations of inputs \({\rm{a}}\), \({\rm{b}}\), and \({\rm{c}}\). We will calculate \({\rm{M}}\left( {{\rm{a}},{\rm{b}},{\rm{c}}} \right)\) first, then its complement \({\rm{X}} = \overline {{\rm{M}}\left( {{\rm{a}},{\rm{b}},{\rm{c}}} \right)}\). Next, we calculate \({\rm{Y}} = {\rm{M}}\left( {{\rm{a}},{\rm{b}},\overline {{\rm{c\;}}} } \right)\) by replacing \({\rm{c}}\) with \(\overline {{\rm{c\;}}} \) in the majority function. Finally, we use \({\rm{X}}\), \({\rm{Y}}\), and \({\rm{c}}\) (which is our \({\rm{Z}}\) input) to find the output of \({\rm{M}}\left( {{\rm{X}},{\rm{Y}},{\rm{c}}} \right)\).
| \({\rm{a}}\) | \({\rm{b}}\) | \({\rm{c}}\) | \({\rm{M}}\left( {{\rm{a}},{\rm{b}},{\rm{c}}} \right)\) | \({\rm{X}} = \overline {{\rm{M}}\left( {{\rm{a}},{\rm{b}},{\rm{c}}} \right)}\) | \(\overline {{\rm{c\;}}} \) | \({\rm{Y}} = {\rm{M}}\left( {{\rm{a}},{\rm{b}},\overline {{\rm{c\;}}} } \right)\) | Final Output \({\rm{M}}\left( {{\rm{X}},{\rm{Y}},{\rm{c}}} \right)\) |
|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 | 1 | \({\rm{M}}\left( {{\rm{0}},{\rm{0}},{\rm{1}}} \right) = 0 \cdot 0 + 0 \cdot 1 + 0 \cdot 1 = 0\) | \({\rm{M}}\left( {{\rm{1}},{\rm{0}},{\rm{0}}} \right) = 1 \cdot 0 + 0 \cdot 0 + 1 \cdot 0 = 0\) |
| 0 | 0 | 1 | 0 | 1 | 0 | \({\rm{M}}\left( {{\rm{0}},{\rm{0}},{\rm{0}}} \right) = 0\) | \({\rm{M}}\left( {{\rm{1}},{\rm{0}},{\rm{1}}} \right) = 1 \cdot 0 + 0 \cdot 1 + 1 \cdot 1 = 1\) |
| 0 | 1 | 0 | 0 | 1 | 1 | \({\rm{M}}\left( {{\rm{0}},{\rm{1}},{\rm{1}}} \right) = 0 \cdot 1 + 1 \cdot 1 + 0 \cdot 1 = 1\) | \({\rm{M}}\left( {{\rm{1}},{\rm{1}},{\rm{0}}} \right) = 1 \cdot 1 + 1 \cdot 0 + 1 \cdot 0 = 1\) |
| 0 | 1 | 1 | 1 | 0 | 0 | \({\rm{M}}\left( {{\rm{0}},{\rm{1}},{\rm{0}}} \right) = 0\) | \({\rm{M}}\left( {{\rm{0}},{\rm{0}},{\rm{1}}} \right) = 0\) |
| 1 | 0 | 0 | 0 | 1 | 1 | \({\rm{M}}\left( {{\rm{1}},{\rm{0}},{\rm{1}}} \right) = 1 \cdot 0 + 0 \cdot 1 + 1 \cdot 1 = 1\) | \({\rm{M}}\left( {{\rm{1}},{\rm{1}},{\rm{0}}} \right) = 1 \cdot 1 + 1 \cdot 0 + 1 \cdot 0 = 1\) |
| 1 | 0 | 1 | 1 | 0 | 0 | \({\rm{M}}\left( {{\rm{1}},{\rm{0}},{\rm{0}}} \right) = 0\) | \({\rm{M}}\left( {{\rm{0}},{\rm{0}},{\rm{1}}} \right) = 0\) |
| 1 | 1 | 0 | 1 | 0 | 1 | \({\rm{M}}\left( {{\rm{1}},{\rm{1}},{\rm{1}}} \right) = 1 \cdot 1 + 1 \cdot 1 + 1 \cdot 1 = 1\) | \({\rm{M}}\left( {{\rm{0}},{\rm{1}},{\rm{0}}} \right) = 0\) |
| 1 | 1 | 1 | 1 | 0 | 0 | \({\rm{M}}\left( {{\rm{1}},{\rm{1}},{\rm{0}}} \right) = 1 \cdot 1 + 1 \cdot 0 + 1 \cdot 0 = 1\) | \({\rm{M}}\left( {{\rm{0}},{\rm{1}},{\rm{1}}} \right) = 0 \cdot 1 + 1 \cdot 1 + 0 \cdot 1 = 1\) |
Identifying the Resulting Gate
Now, let's examine the "Final Output" column of the truth table:
| \({\rm{a}}\) | \({\rm{b}}\) | \({\rm{c}}\) | Final Output |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 1 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 1 |
Comparing this output pattern with standard 3-input logic gates:
- A 3-input AND gate outputs 1 only when all inputs are 1. (Output: 00000001)
- A 3-input OR gate outputs 1 when at least one input is 1. (Output: 01111111)
- A 3-input NAND gate is the complement of AND. (Output: 11111110)
- A 3-input NOR gate is the complement of OR. (Output: 10000000)
- A 3-input EX-OR gate (Exclusive OR) outputs 1 if an odd number of its inputs are 1.
- \(0 \oplus 0 \oplus 0 = 0\) (Even number of 1s)
- \(0 \oplus 0 \oplus 1 = 1\) (Odd number of 1s)
- \(0 \oplus 1 \oplus 0 = 1\) (Odd number of 1s)
- \(0 \oplus 1 \oplus 1 = 0\) (Even number of 1s)
- \(1 \oplus 0 \oplus 0 = 1\) (Odd number of 1s)
- \(1 \oplus 0 \oplus 1 = 0\) (Even number of 1s)
- \(1 \oplus 1 \oplus 0 = 0\) (Even number of 1s)
- \(1 \oplus 1 \oplus 1 = 1\) (Odd number of 1s)
The truth table derived for \({\rm{M}}\left( {\overline {{\rm{M}}\left( {{\rm{a}},{\rm{b}},{\rm{c}}} \right)} ,{\rm{\;M}}\left( {{\rm{a}},{\rm{b}},\overline {{\rm{c\;}}} } \right),{\rm{c}}} \right)\) exactly matches the truth table of a 3-input EX-OR gate.
Important Questions from Karnaugh Maps
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